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Amendment to Rev.7.010 on Revision Up

Additional and changed functions in Rev.7.010


1. Schematic Editor/Symbol Editor
2. Utilities
3. Option
4. Others


1. Schematic Editor/Symbol Editor

  • Change of "Net/Bus Label" dialog
    Accompanying addition of new functions, the "Net/Bus Label" dialog used when selecting net was changed.

  • Improvements in generation of new sheets
    When a new schematic sheet is created, the property value of the sheet property described in the environment resource file ($ZDSROOT/info/lanenv.rsc) is reflected on the generated sheet.

    *Schematic creator and created date values are not set and values are entered as before.

  • Priority function of user signal name and automatic signal name.
    In the conventional function, when nets having different properties are connected, property duplication occurs. Modification was made so that when the user signal name net and auto-generated signal name net are connected, the user net property is given priority so that property duplication does not occur.

    The above function applies only when the user signal name net and auto-generated signal name net are connected using "Input"¨"Net". Net property is duplicated for the following nets.

    • Nets are connected using the "Connect" command.
    • Nets are connected by "Auto-Connect" when moved.
    • Nets are connected by stretching.

  • Net property check when the sheet is saved.
    Modification was made so that when a sheet is saved, if multiple property values are entered for one property (not including net name) in the net in the sheet, a warning message is output.

  • Data cancel object all clear
    Modification was made so that Deselect Object that was possible with the Board Designer can be performed using a back space.




2. Utilities

  • Change of net list output message for the Board Designer.
    Modification was made so that when Board Designer Net/Rule (NDF, RUF) is output from the Net List Processor, if the part does not exist in LCDB, an error occurs by default.

  • Circuit Reference Allocator "Re-used Reference"
    Modification was made so that the property value set in "Re-used Reference"is used for reference when Circuit Reference Allocator is performed for a schematic for which a re-used design is used.

  • Sheet Reference Generator-Gate handling
    Modification was made so that during sheet reference generation, when the gate is the same, the same reference is assigned in accordance with the number of gates in LCDB. When the part that does not reference LCDB is the subject, a different reference is assigned, as before.

  • Improvements in Rule Checker function
    The Rule Checker function has been improved to make it easier to use.

    • In addition to the conventional check mode before net list output, the following check modes are added.
      1. Basic Cheak (Resource File Name: drcbase.rsc)
        Check to identify errors that can be a problem during schematic design operation, or basic mistakes.
      2. LCDB Maching Cheak(Resource File Name:drclcdb.rsc)
        Check to extract problems in net connection by combining "Check for connection status", "Block check", and "ERC" when saving the Schematic Sheet Editor.
      3. Connection Cheak(Resource File Name:drcnet.rsc)
        Check to extract problems in net connection by combining "Check for connection status", "Block check", and "ERC" when saving the Schematic Sheet Editor.

      Note:
      When the resource file ($ZDSROOT/info/eng/drcxxx.rsc , etc.jfor checking with Sheet Rule Checker Rev. 6.0 has been customized, the resource file must be converted.
      Use [Setup] - [Convert Resource File] to convert the resource file.

    • Accompanying function addition and operability improvements, the dialog was changed.

  • DCF Back Annotation
    Design change of the Board Designer used to be made through a BIF file. As of Rev. 7.0, the DCF file is used instead of the BIF file.

    *For the sake of backward compatibility, the new version can also handle (.bif) file back annotations used in Rev. 6.0 and earlier versions




3. Option

  • Design preparation and change tools handle variation information
    Accompanying addition of the design variation information support function of Board Designer Rev. 7.0, output of the design variation information list file (.dst) of the net list for the Board Designer from the SD Net List Processor is supported. In addition to the conventional NDF and RUF, DST can be output from schematics for which design variation is set.

    *DST files cannot be received with Board Designer Rev. 6.0 and earlier.




4. Others

  • Notes about a license
    • Node-locked License
      Hardware key license renewal must be performed. Use "License Version Upgrade Tool" to upgrade the version. For details of the procedure, refer to [System Designer Getting Started "Settig up the License(Node-locked License)"]

    • Floating License
      The license server program must be installed. Use the CD-ROM to set up the license server program. For details of the procedure, refer to [System Designer Getting Started "Settig up the License(Floating License)"]

      Note:
      Install the license server program after uninstalling license server program Rev. 6.0.

  • Change of Support OS
    Rev.7.0 supports the following OS
    • HP-UX version
      HP-UX 10.20ACE3 , 10.20ACE4 , 10.20ACE5 , HP-UX 11i
    • Solaris version
      Solaris 7, 8
    • Windows version
      Windows NT4.0 , Windows 2000 , Windows XP Professional
    Note:
    Beginning with Rev.7.0, Windows 95,98,Me Solaris2.5.1,2.6 will be excluded from formal support.

  • Restriction of mixed environment running under System Designer and the Board Designer
    You can operate Board Designer Rev.7.0 in combination with either Rev.6.0 or Rev.7.0 of System Designer. When you mix different versions, there are some restrictions concerning attribute value passing and functions that are added to a new version.Use them with the following points in mind.

    Mixing different versions refers to one of the following combinations:

  • SD:Rev.6.0xx,BD:Rev.7.0xx
  • SD:Rev.7.0xx,BD:Rev.6.0xx
    • When you use SD:Rev. 7.0xx and BD:Rev. 6.0xx
      There are restrictions on Forward annotation and Backward annotation.

      (1) Concerning rule attributes
      When you set the following attribute in System Designer, Forward annotation in Board Designer Rev.6.020 or earlier will encounter a design/rule list read error and the execution will abort.

      [Pin rule]
      Decoupling Distance (decoupleDist)

      (2) Concerning the design variation supporting operation
      Contents of the design variation setting set in System Designer cannot be reflected onto Board Designer.

      (3) Concerning circuit / PC board dataset management
      Board Designer tools cannot recognize the relation between circuit data and PC board data created by System Designer tools.

    • When you use SD:Rev.6.0xx and BD:Rev.7.0xx
      There are restrictions on Forward annotation and Backward annotation.

      (1) Concerning rule attributes
      When you set the following attribute in Board Designer, you cannot perform the Backward annotation to System Designer. Also, if you perform the Forward annotation in the same circumstance, values set in Board Designer will be deleted.

      [Net rule]
      Layout Guide (layoutGuide)* With System Designer Rev.6.020 or later, you can pass the value.
      [Component rule]
      Layout Guide (layoutGuide)

      (2) Concerning [DCF file]
      When System Designer and Board Designer are both Rev.7.0xx Backward annotation is performed using a [DCF file], but if System Designer is Rev.6.0xx, it is performed using [BIF file] as in the past.
      * If you operate Board Designer Rev.7.0xx along with System Designer Rev.6.0xx that is installed on a different machine, setting environment variable [ZECO_BAOUT_BOTH] to ON enables you to output [BIF file] as well as [DCF file]

      (3) Concerning the design variation supporting operation
      Contents of the design variation setting set in System Designer cannot be reflected onto Board Designer.

      (4) Concerning circuit / PC board dataset management
      System Designer tools cannot recognize the relation between circuit data and PC board data created by Board Designer tools.

      (5) Concerning Backward annotation during interactive design
      When you execute active Backward annotation on Board Designer, Backward annotation will not be initiated in the System Designer side.

      "No corresponding circuit editor. Schematic was not changed."

      will be the output.

    • Restrictions on install
      To create a mix environment of Rev.6.0 and Rev.7.0, install Rev.6.0 application programs first.




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